Freescale Semiconductor /MKL28Z7 /SMC /STOPCTRL

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Interpret as STOPCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)LLSM0 (0)LPOPO 0 (0)PORPO 0 (00)PSTOPO

PSTOPO=00, PORPO=0, LPOPO=0, LLSM=000

Description

Stop Control Register

Fields

LLSM

LLS or VLLS Mode Control

0 (000): VLLS0 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx

1 (001): VLLS1 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx

2 (010): VLLS2 if PMCTRL[STOPM]=VLLSx, LLS2 if PMCTRL[STOPM]=LLSx

3 (011): VLLS3 if PMCTRL[STOPM]=VLLSx, LLS3 if PMCTRL[STOPM]=LLSx

LPOPO

LPO Power Option

0 (0): LPO clock is enabled in LLS/VLLSx

1 (1): LPO clock is disabled in LLS/VLLSx

PORPO

POR Power Option

0 (0): POR detect circuit is enabled in VLLS0

1 (1): POR detect circuit is disabled in VLLS0

PSTOPO

Partial Stop Option

0 (00): STOP - Normal Stop mode

1 (01): PSTOP1 - Partial Stop with both system and bus clocks disabled

2 (10): PSTOP2 - Partial Stop with system clock disabled and bus clock enabled

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